It has many advantages, if you use the LogicAnalyser and Sigrok on Linux. So far, we didn’t have made a binary. So you have to compile and build Sigrok. The description how to compile and build is the same as I/O-View. http://www.ipdbg.org/?page_id=19

After compiling an building Sigrok you have to start the JTAGHOST over the terminal. To do this you have to go to the folder Debug over IPDBG/JtagHost/bin/Debug and open the JtagHost. Then you have to start Pulseview/Sigrok. To open this program, you have to go to libsigrok over sigrok and open it with …/pulseview/pulseview. Now you can set the trigger-conditions and start the program.

In the hardware descriptions you have to set which hardware you want to use and in the JTAG-HUB file under TARGET_TECHNOLOGY you have to set which technology you want to use. By now can you set this with a number.

Number zero is for the ipdbg-tap which means for all technologies that don’t have a reserved in- and output for the JTAG-interface (e.g. ICE40). Number one is for the Spartan3 from Xilinx and number two is for the ECP2 from Lattice.

After setting the techonology you have to include your Project in our Project. You should make this in the demofiles as a component. After that, you only have to link the signal DataIn_LogicAnalyser from The_LogicAnalyser component to the signal from your component which you want to measure.

Now you only have to program your FPGA and it works.