If you want to use I/O-View you don’t have to compile JTAG-HOST and I/O-View. You only have to download the ZIP-Files of I/O-View and the JTAGHOST and start this two programs. But this is only working, if you use one of the supported manufacturers.

If you use another manufacturer, you have to build the JTAGHOST and make a new function which supports your new manufacturer. The description how to build the JTAGHOST is here: http://www.ipdbg.org/?page_id=19

If you use a USB-adapter you don’t have high expenditure. You only have to start the JTAGHOST. This program will ask you after the cable the vid and the pid. There you have to enter the right parameters. But if you don’t use a USB-adapter, you have to adapt the JTAGHOST. The description how to make this is here: http://www.ipdbg.org/?page_id=63

In the hardware descriptions you have to set which hardware you want to use. First you have to checkout the IPDBG-Project on github. There you have to set in the JTAG-HUB file under TARGET_TECHNOLOGY the technology you want to use. You can set this with a number.

Number zero is for the ipdbg-tap which means for all technologies that don’t have a reserved in- and output for the JTAG-interface (e.g. ICE40). Number one is for the Spartan3 from Xilinx and number two is for the ECP2 from Lattice.

If you only want to readout or set in- and ouputs of the FPGA you have to uncomment the two lines Input_IOVIEW and Output_IOVIEW. After that you should link the two signals INPUT_DeviceUnderTest_Ioview_s and OUTPUT_DeviceUnderTest_Ioview_s from the I/O-VIEW component to the Signals Input_IOVIEW and Output_IOVIEW. After that I/O-View is linked to the in- and ouputs.

But if you want to readout and set FlipFlops in the FPGA, you have to include your Project  in our Project. You should make this in the demofiles as a component. After that you only have to link the signal Output_DeviceunderTest_IOVIEW_s and INPUT_DeviceUnderTest_Ioview_s to your signals you want to readout or set.

Now you only have to programm your FPGA and it works.